Yi-Ming Lin (林宜民)

Yi-Ming Lin (林宜民)

Yi-Ming Lin was born in Kaohsiung, Taiwan, in 1980. He received the Ph.D. degree in Computer Science and Information Engineering from National Cheng Kung University in 2010. He is currently a senior engineer in the Global Unichip Corporation (GUC), Hsinchu, Taiwan.

E-Mail: ymlin@csie.ncku.edu.tw

Biography

Yi-Ming Lin received the B.S. degree in Electronic Engineering from Southern Taiwan University, Taiwan, in 2003, the M.S. degree in Electronic Engineering from Southern Taiwan University, Taiwan, in 2005, and the Ph.D. degree in Computer Science and Information Engineering from National Cheng Kung University in 2010. His research interests include digital integrated circuit (IC) design, intelligence property (IP) design, system-on-chip (SOC) design, and efficient VLSI architecture and implementation for video compression (MPEG-1/2/4 and H.264) and wireless communication system.

Publications

Journal Papers

1. Pei-Yin Chen and Yi-Ming Lin, “A Low-Cost CAVLC Encoder,” IEICE Trans. on Electronics, vol. E89-C, no. 12, pp. 1950-1953, Dec. 2006.

2. Pei-Yin Chen and Yi-Ming Lin, “A Low-Cost VLC Implementation for MPEG-4,” IEEE Trans. on Circuits Syst. II, Express Briefs, vol. 54, no. 6, pp. 507-511, June 2007.

3. Pei-Yin Chen, Yi-Ming Lin, and Min-Yi Cho, “An Efficient Design of Variable Length Decoder for MPEG-1/2/4,” IEEE Trans. on Multimedia, vol. 10, no. 7, pp. 1307-1315, Nov. 2008.

4. Pei-Yin Chen, Yi-Ming Lin, Che-Chang Yang, and Shung-Chih Chen, “An Efficient Design of Context Modeler for CABAC Encoder in H.264,” International Journal of Innovative Computing, Information and Control, vol. 6, no. 6, pp. 2609-2620, June 2010.

Conference Papers

1. Yi-Ming Lin and Pei-Yin Chen, “A Low-Cost VLSI Implementation for VLC,” IEEE International Conference on Industrial Electronics and Applications, pp. 1019-1022, May 2006.

2. Yi-Ming Lin and Pei-Yin Chen, “An Efficient Implementation of CAVLC for H.264/AVC,” IEEE International Conference on Innovative Computing, Information and Control, pp. 601-604, Aug. 2006.

3. Yi-Ming Lin, Pei-Yin Chen, Chih-Yuan Lien, and Min-Yi Cho, “An Efficient Table-Merging Method for Variable Length Coding,” IEEE International Conference on Electron Devices and Solid-State Circuits, pp. 1179-1882, Dec. 2007.

4. Pei-Yin Chen, Chih-Yuan Lien, and Yi-Ming Lin, “A Real-Time Image Denoising Chip,” IEEE International Symposium on Circuits and Systems, pp. 3390-3393, May 2008.

5. Yi-Ming Lin, Wan-Ching Liu, Li-Yuan Chang, Chih-Yuan Lien, Pei-Yin Chen, and Shung-Chih Chen, “A Low-Power IP Design of Viterbi Decoder with Dynamic Threshold Setting,” IEEE International Symposium on Circuits and Systems, pp. 585-588, May 2010.

6. Chih-Yuan Lien, Pei-Yin Chen, Li-Yuan Chang and Yi-Ming Lin, “An Efficient Denoising Chip for the Removal of Impulse Noise,” IEEE International Symposium on Circuits and Systems, pp. 1169-1172, May 2010.

7. Pei-Yin Chen, Li-Yuan Chang, Yi-Ming Lin, Chih-Yuan Lien, and Ching-Sung Chen, “Robust Distributed Estimation Using Efficient Sensor-Fault Detection in Sensor Networks,” International Symposium on Aware Computing, pp. 39-43, Nov. 2010.

8. Yi-Ming Lin, Chun-Hsien Yeh, Sheng-Hung Yen, Ching-Hsuan Ma, Pei-Yin Chen, and C.-C. Jay Kuo, “Efficient VLSI Design for SIFT Feature Description,” International Symposium on Next-Generation Electronics, pp. 48-51, Nov. 2010.

9. Yeu-Horng Shiau, Pei-Yin Chen, Hung-Yu Yang, Yi-Ming Lin and Shi-Gi Huang, “An Efficient VLSI Architecture for Convolutional Code Decoding,” International Symposium on Next-Generation Electronics, pp. 223-226, Nov. 2010.

Experience

1. Teaching assistant of undergraduate course, VLSI Design

2. Teaching assistant of undergraduate course, FPGA System Design

3. Teaching assistant of graduate course, Digital IC Design

4. Assistant for paper publication, IEEE TENCON 2007

5. Assistant for paper publication, IEEE ISCAS 2009

Honors & Awards

1. Third Prize, Layout Category for Undergraduate Level, Integrated Circuit Design Contest, Ministry of Education, 2003.

2. Session Chair, Industrial Applications, IEEE International Conference on Industrial Electronics and Applications, 2006.

3. Second Prize, Cell-Based IC Category for Graduate/Undergraduate Level, Integrated Circuit Design Contest, Ministry of Education, 2007.

4. Visiting Scholar, Department of Electrical Engineering, University of Southern California, 2009-2010.

Chip Design