Yi-Ming Lin (林宜民)
Yi-Ming Lin was born in
E-Mail: ymlin@csie.ncku.edu.tw
Biography
Yi-Ming Lin received the B.S. and M.S.
degrees in the Department of Electronic Engineering, Southern Taiwan University
of Technology, Taiwan, in 2003 and 2005, respectively. Since 2005, he has been
working toward the Ph.D. degree in the Department of Computer Science and
Information Engineering,
Publications
Journal Papers
1. Pei-Yin Chen and Yi-Ming Lin, “A Low-Cost CAVLC Encoder,” IEICE Trans. on Electronics,
vol. E89-C, no. 12, pp. 1950-1953, Dec. 2006.
2. Pei-Yin Chen and Yi-Ming
Lin, “A Low-Cost VLC Implementation for MPEG-4,” IEEE Trans. on
Circuits Syst. II, Express Briefs, vol. 54, no. 6, pp. 507-511, June 2007.
3. Pei-Yin Chen, Yi-Ming
Lin, and Min-Yi Cho, “An Efficient Design of Variable Length Decoder for
MPEG-1/2/4,” IEEE Trans. on Multimedia,
vol. 10, no. 7, pp. 1307-1315, Nov. 2008.
4. Pei-Yin Chen, Yi-Ming
Lin, Che-Chang Yang, and Shung-Chih Chen, “An Efficient Design of Context
Modeler for CABAC Encoder in H.264,” accepted by International Journal of Innovative Computing, Information and Control,
Aug. 2009.
Conference Papers
1. Yi-Ming
Lin and Pei-Yin Chen, “A Low-Cost VLSI Implementation
for VLC,” IEEE International Conference on Industrial Electronics and
Applications, ICIEA’06, pp. 1019-1022, May 2006.
2. Yi-Ming
Lin and Pei-Yin Chen, “An Efficient
Implementation of CAVLC for H.264/AVC,” IEEE International Conference on
Innovative Computing, Information and Control, ICICIC’06, pp. 601-604, Aug.
2006.
3. Yi-Ming Lin,
Pei-Yin Chen, Chih-Yuan Lien, and Min-Yi Cho, “An Efficient Table-Merging
Method for Variable Length Coding,” IEEE
International Conference on Electron Devices and Solid-State Circuits,
EDSSC’07, pp. 1179-1882, Dec. 2007.
4. Pei-Yin Chen, Chih-Yuan Lien, and Yi-Ming Lin, “A Real-Time Image Denoising Chip,” IEEE International Symposium on Circuits and
Systems, ISCAS’08, pp. 3390-3393, May 2008.
5. Yi-Ming Lin,
Wan-Ching Liu, Li-Yuan Chang, Chih-Yuan Lien, Pei-Yin Chen, and Shung-Chih
Chen, “A Low-Power IP Design of Viterbi Decoder with Dynamic Threshold
Setting,” accepted by 2010 IEEE
International Symposium on Circuits and Systems, January 2010.
6. Chih-Yuan Lien, Pei-Yin Chen, Li-Yuan Chang and Yi-Ming Lin, “An Efficient Denoising
Chip for the Removal of Impulse Noise,” accepted by 2010 IEEE International Symposium on Circuits and Systems, January 2010.
Experience
1. Teaching assistant of undergraduate course, VLSI Design
2. Teaching assistant of undergraduate course, FPGA System Design
3. Teaching assistant of graduate course, Digital IC Design
4. Assistant for paper publication, IEEE TENCON 2007
5. Assistant for paper publication, IEEE ISCAS 2009
Honors & Awards
1. Third Prize, Layout Category
for Undergraduate Level, Integrated Circuit Design Contest, Ministry of
Education, 2003.
2. Session
Chair, Industrial Applications, IEEE International Conference on Industrial
Electronics and Applications, 2006.
3. Second
Prize, Cell-Based IC Category for Graduate/Undergraduate Level, Integrated
Circuit Design Contest, Ministry of Education, 2007.
4. Visiting
Scholar, Department
of Electrical Engineering, University of Southern California, 2009-2010.
Chip Design
1. A Low-Cost VLC Implementation for MPEG-4
(A) Cell-Based Design
(B) Technology: TSMC 0.18 μm
2. A Low-Cost CAVLC Encoder
(A) Cell-Based Design
(B) Technology: TSMC 0.13 μm
3. A Low-Cost Variable Length
Decoder for MPEG-1/2/4 (Tapeout by CIC)
(A) Cell-Based Design
(B) Technology: TSMC 0.18 μm
4. A Parameterized Low Power
Convolutional Code Decoder for Wireless Communication Systems (Tapeout by
CIC)
(A) Cell-Based Design
(B) Technology: TSMC 0.18 μm
Book
1. 陳培殷, 劉明穎, 林宜民, 謝怡伶編著, 數位IC設計入門—Verilog, 滄海書局, 2008. (ISBN
978-986-6889-90-5)
Documents
1. Simulation and Verification with Altera FPGA (PDF)
(Source Code)
2. Simulation and Verification with Xilinx FPGA (PDF)
(Source Code)
Other Links
National Cheng Kung University (NCKU)
College of Electrical Engineering
and Computer Science - NCKU
Department of Computer Science and
Information Engineering - NCKU